Si4432 V1.0 RF MODULE interfacing with PIC MCU thru' SPI (2024)

Dear all,

I need to interface Silicon Labs Si4432 v1.0 Module with PIC16F1938 thru' SPI module. I could not able to receive signal from Si4432.

The settings are follows:

Si4432 V1.0 RF MODULE: SILICON LABS
MCU - PIC16F1938 - 8 BIT MCU

HARDW(A)IRES CONNECTION:

GND - GND
GPIO_0 - 0 V - UNCONNECTED TO MCU
GPIO_1 - 2.90 V - UNCONNECTED TO MCU
GPIO_2 - 1.42 V - UNCONNECTED TO MCU
VDD - 2.90V (2 AA BATTERY)
SDO - 0V - CONNECTED TO MCU'S SDI
SDI - 0V - CONNECTED TO MCU'S SDO
SCLK - 0V - CONNECTED TO MCU'S SCLK
nSEL - 0V - CONNECTED TO MCU'S DIG I/O PIN
nIRQ - 0V - CONNECTED TO MCU'S INTERRUPT PIN
SDN - GND - Always ON
GND - GND

MCU:

1. RB0 - SET AS INPUT (TRISB0 = 1) for nIRQ interrupt
2. RC4 - SET AS INPUT (TRISC4 = 1) for SDI

3. MCU internal clock - 4 MHz
4. INTIE and SSPIE interrupts enabled and GIE set

SW CODE:

init SPI Module:

Code C - [expand]
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void init_SSP_Module(){SSPIE = 1;SSPIF = 0; // SSP STATUS RegisterSSPSTAT = 10000000; // 8 - SMP -> SPI data input sample bit - 1 = Input data sampled at end of  //data output time // 7 - CKE: SPI Clock Edge Select bit - 0 = Transmit occurs on transition from  // Idle to active clock state // 6-0 - USED FOR I2C ONLY// SSP CONTROL 1 RegisterSSPCON1 = 00100000; // 76 - READ ONLY  // 5 - SSPEN: Synchronous Serial Port Enable bit // 4 - CKP: Clock Polarity Select bit - 0 = Idle state for clock is a low level // SSPM<3:0>: Synchronous Serial Port Mode Select bits // 0000 = SPI Master mode, clock = FOSC/4SSPCON3 = 00000000; // 765 - READ ONLY // 4 - BOEN: Buffer Overwrite Enable bit // 0123 - READ ONLYRC2 = 1; // pull nSEL (Si4432) pin High}

Reading Si4432:

1. char ItStatus1;
2. ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register

Code C - [expand]
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char SpiReadRegister (char reg){RC2 = 0; // set nSEL lowSSPBUF = reg; //write data into the SPI register;while(SSPIF == 0);SSPIF = 0;SSPBUF = 0xFF; //write dummy data into the SPI registerwhile(SSPIF == 0);SSPIF = 0;RC2 = 1;return SSPBUF;}

Si4432 - Serial Peripheral Interface (SPI)

The Si4430/31/32 communicates with the host MCU over a standard 3-wire SPI interface: SCLK, SDI, and nSEL. The host MCU can read data from the device on the SDO output pin. A SPI transaction is a 16-bit sequence which consists of a Read-Write (R/W) select bit, followed by a 7-bit address field (ADDR), and an 8-bit data field (DATA) as demonstrated in Figure 3. The 7-bit address field is used to select one of the 128, 8-bit control registers. The R/W select bit determines whether the SPI transaction is a read or write transaction. If R/W = 1 it signifies a WRITE transaction, while R/W = 0 signifies a READ transaction. The contents (ADDR or DATA) are latched into the Si4430/31/32 every eight clock cycles. The timing parameters for the SPI interface are shown in Table 10. The SCLK rate is flexible with a maximum rate of 10 MHz.

any help?

thanks
pmk

Added:

Silicon Labs' example code for reading Si4432: They have used C8501F93X MCU to communicate with Si4432.

They set:

CKPHA = 0; // CLOCK PHASE -> data centered on first edge of SCK period
CKPOL = 0; // POLARITY -> SCK line is low in idle state

NSS pin connected to nSEL pin of Si4432 RF (it is like SS pin in MCU to read/write SPI)

I set as:

CKE = 0; // Transmit occurs on transition from Idle to active clock state (rising edge)
CKP = 0; // Polarity -> SCK line is low in idle state
SMP = 1; // 1 = Input data sampled at end of data output time

I am receiving some data. I don't know whether it is valid data. But, I don't know the register settings of Si4432.

on Module 30 MHz clock used. Module works fine. But I could not able to read thru' SPI.

Also SCK timing is different in both datasheet. i.e PIC16F1938 and C8501F93X.

Any idea?

thanks
pmk

Problem with hardware. Solved the problem. It works fine now.

thanks
pmk